clock disable register
| CLK_FC0_DIS | Write 1 to disable FLEXCOMM0 clock |
| CLK_FC1_DIS | Write 1 to disable FLEXCOMM1 clock |
| CLK_FC2_DIS | Write 1 to disable FLEXCOMM2 clock |
| CLK_FC3_DIS | Write 1 to disable FLEXCOMM3 clock |
| CLK_TIM0_DIS | Write 1 to disable CTIMER0 clock |
| CLK_TIM1_DIS | Write 1 to disable CTIMER1 clock |
| CLK_TIM2_DIS | Write 1 to disable CTIMER2 clock |
| CLK_TIM3_DIS | Write 1 to disable CTIMER3 clock |
| CLK_SCT_DIS | Write 1 to disable SCT clock |
| CLK_WDT_DIS | Write 1 to disable Watch Dog clock |
| CLK_USB_DIS | Write 1 to disable USB clock; |
| CLK_GPIO_DIS | Write 1 to disable GPIO clock |
| CLK_BIV_DIS | Write 1 to disable BIV APB clock include RTC BiV register. |
| CLK_ADC_DIS | Write 1 to disable ADC clock; |
| CLK_DAC_DIS | Write 1 to disable DAC clock; |
| CLK_CS_DIS | Write 1 to disable Cap sensor clock; |
| CLK_FSP_DIS | Write 1 to disable FSP clock; |
| CLK_DMA_DIS | Write 1 to disable DMA clock |
| CLK_QDEC0_DIS | Write 1 to disable QDEC0 clock; |
| CLK_QDEC1_DIS | Write 1 to disable QDEC1 clock; |
| CLK_DP_DIS | Write 1 to disable Data Path 16/8MHz clock; |
| CLK_SPIFI_DIS | Write 1 to disable SPIFI clock; |
| CLK_CAL_DIS | Write 1 to disable Calibration clock; |
| CLK_BLE_DIS | Write 1 to disable BLE clock |
| PCLK_DIS | Write 1 to disable PCLK of some logic; |
| FCLK_DIS | Write 1 to disable CPU FCLK; |